Integrated circuit chin packages are commonly arranged in a particular configuration on a printed circuit board in order to perform a desired electronic function. The integrated circuit chip package may include an integrated circuit chip with one or more signal lines electrically coupled to the circuitry of the chip. The signal lines carry information from the chip to one or more other components on the printed circuit board and carry information from the other components back to the chip. This is typically known as an input/output or I/O function.
In prior integrated circuit chip packages, a single, discrete signal line was dedicated to carrying information from the chip to other components. A separate single transmission line was dedicated to carrying information to the chip. A disadvantage of having discreet input and output signal lines is that, for a given line, noise from external sources can be introduced into the circuit by way of the signal line. In general, noise is undesirable because it degrades the signal being carried by the signal line.
One method for dealing with the problem of noise is to produce signals at a relatively high voltage (e.g., on the order of about five volts) so that the signal will be easily distinguishable from the noise. Integrated circuits are being designed, however, to operate at higher and higher speeds. Therefore, it is desirable to have a faster rise time from a state in which there is no signal to a state in which the signal exists at a functional level. The need for higher speeds and faster rise times is due in part to the increasing signal frequency at which integrated circuits are being designed to operate. One method of improving rise time is to lower the voltage value for a signal. For example, if signal voltage is on the order of about one volt, a faster rise time will be achieved than if the signal voltage is on the order of about five volts. One problem with using lower voltages, however, is that noise on the circuit is harder to distinguish from the signal being transmitted through the circuit.
A method for overcoming this problem is to use differential pairs of signal lines to achieve the input/output function. In such a system, a pair of lines is provided in which one of the lines receives information and the other line transmits information. With differential pair, the same signal is traveling through both lines except that the polarities of the lines are opposite each other. In this configuration, the noise value on one line will cancel out the noise value on the other line of the pair, thereby achieving noise isolation.
A typical intrated circuit chip package using differential pairs of signal lines is limited in the number of lines which can be incorporated into the package. A factor which limits the number of lines is the impedance characteristic of the differential pair. Impedance in an electrical circuit must be controlled and is typically set at a predetermined value. The impedance level of an integrated circuit chip package and, therefore, of differential pairs within an integrated circuit chip package will be dictated by the electronic device incorporating the integrated circuit chip package. Impedance is generally a function of line width, line height, and separation of the lines from one another in a differential pair. Also contributing to a particular impedance is the distance from a signal line to a ground plane within the integrated circuit chip package. Typical integrated circuit chip packages which incorporate differential pairs of signal lines are formed such that the two signal lines which make up a given differential pair are coplanar. That is, the pair of lines exists in one plane which is parallel to the plane defined by the integrated circuit chip package. Typically, a ground plane is provided in a separate plane which is different from the plane of the differential pair.
Because impedance is affected by the space between pairs and the space between the two lines of a given pair, the typical integrated circuit chip packages is limited in the number of differential pairs which may be provided within given planar area of an integratea circuit chip package. One solution is to make the lines themselves smaller, thereby allowing more pairs to coexist in a given plane. However, the capabilities within the industry in this respect are limited. Even using the smallest wires that are available in industry, it is desirable to be able to have more pairs of signal lines within a given planar area of an integrated circuit chip package. Also, developing and producing smaller lines of differential pairs is costly. Further, if a line is designed to be too small, then the line might not adequately carry a signal and may become more susceptible to damage or deterioration.